LS2K0500
LS2K0500
A highly integrated low-power SoC for industrial control, printing terminals, BMC etc. It integrates LA264, DDR3 controller, PCIE2.0, SATA2.0, USB3.0/2.0, GMAC, Audio and Video interface, Printer interface, and other common interfaces.
LS2K0500 Specification
Frequency
500MHz
Number of cores
1
Number of cores
1
Processor core
64-bit superscalar processor core LA264; Supporting LoongArch® instruction set architecture; 2-issue out-of-order execution; 2 fixed-point units, 1 float-point units, and 1 memory access units
High-speed cache
a 32KB private L1 instruction cache and a 32KB private L1 data cache;512KB L2 cache.
High-speed cache
a 32KB private L1 instruction cache and a 32KB private L1 data cache;512KB L2 cache.
Memory controller
32-bit DDR3-800 controller;
High-speed I/O
PCIE2.0, SATA2.0, USB3.0, USB2.0, GMAC
I/O
PCI, SPI, PRINT, UART, GPIO, PS/2, PWM, I2C, CAN, LIO, DVO, HDA/AC97, SDIO, NAND, LPC
Power management
Supporting dynamic frequency scaling in main clock domains; Supporting dynamic voltage scaling in main voltage domains.
Typical power consumption
1-3W
